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Technologist, ASIC Development Engineering

Location: Bangalore, KA, India 
Req ID: JR-0000041719


Technologist, ASIC Development Engineering

Location:  Bangalore India
Req Id: JR-0000041719

Western Digital®

We deliver the possibilities of data. YOU define what’s possible.

Standardize the BCMS across HDD and SSD/Flash business units worldwide and coordinate the sites business continuity plans for the customers visibility and continued trust. Lead Projects and initiatives Offices compliance to the Integrated Management Systems while fulfilling general administration.

Essential Duties and Responsibilities:
•Will be part of a team responsible for delivering next-generation PHY designs for SoCs in leading-edge CMOS process technology nodes at 28nm and beyond
•Ownership of analog and digital circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements
•Interact with cross-functional teams to define requirements/specs (e.g., modeling, package, board, DFT, ESD, etc.)
•Create block-level specifications based on link-budget, behavioral modeling, and transistor-level feasibility
•Handling assigned projects independently, leading a small team of junior engineers
•Pro-actively get design issues/problems resolved
•Work closely with the layout engineers on providing requirements and guidelines
•Defining production/bench-level test-plans.

10+ years of experience in Analog and mixed signal design, should have 3-5 years of experience as a project leader
Should have experience in leading designs from specification through Silicon debug/characterization. 
Should have hands-on experience in multi-Gbps SERDES block level designs (Rx, Tx, CDR, PLL, DLL, VGA, CTLE, DFE, voltage and current references, voltage detectors, LDOs)
Knowledge of different CDR architectures is a plus
Strong background in wireline communication and equalization techniques
Experience in analyzing link jitter budget for high-speed serial links and creating block level requirements.
Sound knowledge about high-speed SERDES protocols (PCIe, SATA, USB, UFS, etc.)
Should have solid understanding of CMOS and FinFET process technologies and associated issues in deep sub-micron technologies i.e. 28nm, 16nm and smaller.
Should have hands-on experience in simulation of analog blocks, mixed-mode simulations, statistical simulations etc. 
Knowledge in modelling (Simulink, Matlab, VerilogA, etc.) tools will be an advantage
Should have good insight into layouts and Knowledge of ESD requirements.
Experience in lab testing and debugging for high-speed serial links and protocol compliance
Should possess good documentation, communication and presentation skills
Should have experience in a multi-site environment

Western Digital Corporation is the world’s largest data storage company with a leading portfolio of HGST, SanDisk, G-Technology and WD brands covering flash and disk-based solutions. Deployed by the largest and most prominent organizations worldwide, Western Digital solutions are everywhere, touching lives and enabling great value from the data they possess.