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Technician 2, Mask Design Engineering

Location: Milpitas, CA, United States 
Req ID: JR-0000038504

Description

Understanding layout basics/concepts. Standard cell layout knowledge. Exposure and hands on to block level layout design. Basic understanding of memory layout. Basic understanding of analog layout concepts – Matching, shielding, Symmetry. Basic understanding of ESD, Reliability and DFM concepts. Handling of digital blocks using custom router. Complete understanding of design rules and verification – DRC, LVS. Debugging techniques (DRC/LVS) Experience of EDA tools: Cadence Virtuoso Layout Editor, Synopsys Hercules, Mentor Graphics. Good knowledge on Unix/Linux, vi editor, xcel, ppt…etc.