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Principal Engineer, Hardware Development Engineering

Location: Omer, IL, Israel 
Req ID: JR-0000038121


Job Description:

  • Power and Signal Integrity analysis of multi-chip packages
  • Chip-package co-design following signal/power integrity considerations
  • Signal integrity analysis of SSD systems┬áTiming simulation of memory and SerDes interfaces with Hspice and Keysight ADS


  • Signal Integrity knowledge
  • Experience in board/package design
  • Proven ability to use modern tools for S-parameter extraction of board/package
  • System level SI simulation using simulation tools
  • Understanding of functionality of different I/Os
  • Tools Used : Cadence PowerSI/ Agilent ADS/ Mentor Nimbic/Allegro SIP
  • Expertise in circuit simulation with different tools such as Hspice and ADS