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- Developing micro-architecture specifications.
- Logic design, implementation, and verification using Verilog, System Verilog, and any required programing and scripting languages.
- Design integration, logic synthesize, and design optimization for timing, area and power.
- Developing front-end methodologies and tool flows.
- Participating in chip bring-up and testing.
- Master’s degree in Electrical Engineering with 0-5 years of experience.
- Good understanding of computer architecture, logic design and VLSI design.
- Knowledge of SystemVerilog, Verilog and C.
- Knowledge of design verification, and functional coverage.
- Ability to program scripting languages.
- Strong communication skills and a good team player.
- Knowledge in logic synthesis and timing closer are must, and some experience is a plus.