Western Digital Careers
Join our Talent Network

Staff Engineer, ASIC Development Engineering

This job posting is no longer active

Location: Bangalore, KA, India 
Req ID: JR-9999035910

Description

 

General Description: Designs, develops, modifies and evaluates electronic parts, components or integrated circuitry for electronic equipment and other hardware systems. Determines design approaches and parameters. Analyzes equipment to establish operating data, conducts experimental tests and evaluates results. Selects components and equipment based on analysis of specifications and reliability. May also review vendor capability to support product development. Skills/Experience: Requires BS/BA degree or equivalent with 7 or more years of related experience. The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment. Self-motivated and self-directed, however, must have demonstrated ability to work well with people. A proven desire to work as a team member, both on the same team and outside of the team. Ability to troubleshoot and analyze complex problems. Ability to multi-task and meet deadlines. Excellent communication (written and verbal) and interpersonal skills.

 

Job description

Analog/IO Staff Design Engineer would be responsible for designing high performance mixed signal IP’s for controller ASIC. Responsible for the defining specification/architecture, design, layout and characterization of various analog/IO blocks like – Linear Voltage Regulators, Temperature Sensors, AFE for high speed/high drive interfaces, data convertors etc.

Candidate would be expected to work closely with the inter-continental teams including participation in internal meetings and review sessions.

Candidate will be responsible for leading the project development cycle by innovative design solutions/methodologies and should provide technical leadership/mentoring.

Required Experience:

  • Bachelor/Master/Phd in Electronics/Electrical Engineering with 6+ years of experience in Analog and mixed signal design/architecture and layout.
  • Detailed hands on experience in any of the analog blocks such as Charge pumps, DC-DC, ADLL, PLL, Sensor band-gap references, LDOs, oscillators, data convertors, high speed transceivers etc.
  • Should have solid understanding of CMOS and FinFET process technologies and associated issues in deep sub-micron technologies i.e. 28nm and smaller.
  • Experience as a project leader to lead designs from specification through Silicon debug/characterization.
  • Should have hands on experience in simulation of analog blocks, mixed-mode simulations, statistical simulations etc
  • Should have good insight into layouts
  • Should have experience in a multi-site environment, interacting with teams in other sites.