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Staff Engineer, Packaging Engineering

Location: Shanghai, 31, China 
Req ID: JR-9999034263


SanDisk®, a Western Digital brand, has been expanding the possibilities of data storage for more than 25 years—giving businesses and consumers the peace of mind that comes from knowing their data is readily available and reliable, even in the most challenging environments. Our products are used in the world's leading-edge data centers, embedded in game-changing smartphones, tablets, and laptops, and entrusted by consumers around the world. As a vertically-integrated storage solution company, we are able to quickly deliver innovative, high-quality solutions with less time from research to realization. From mobile devices to hyperscale data centers, SanDisk storage solutions make the incredible possible.


Job Description:

Working with Program team and other Packaging Engineering team to assure the Quality of new Technology Programs and new PlatForms development.

  1. PID Quality Control for new wafer technology:
    • Thin Die Qual design and validation;
    • PID Charz DOE design and validation;
    • PID process change related Charz DOE design and validation;
    • PID tape out involvement;
    • PID design with Lesson Learnt and FMEA;
    • PID PNTF, Statistic Design & Analysis, IVT, VECQ, ePPM Score card, Measurement Instruction, Validation, Toll Gate, etc.
  2. New Technology Programs Design and Development Quality Assurance:
    • TDW/TDS/EDS/MDS, PNTF, CFMEA, VECQ, Measurement Instruction, Statistic Design & Analysis, Toll Gate, Audit, Validation, etc.
  3. New PlatForms Design and Development Quality Assurance
    • Proposing, Verifying, Ground Rule, PNTF, PF-FMEA, VECQ, Measurement Instruction, Statistic Design & Analysis, Toll Gate, Audit, Validation, DI team, etc.
  4. New Packages (retail) Design and Development Quality Assurance
    • PDS signature, Recipe Baseline, TDCN, IVT, Toll Gate, etc.
  5. TDCN and DCCB review committee.
  6. Excursion/Abnormal Control
    • RCA, Agile Team, DMAIC, etc.
  7. Competitor Analysis for new Technology and PlatForm
    • Flip Chip, Fan In/Out, 3D NAND, High capacity PKG, etc.
  8. Charz Analysis
    • FIB/SEM/EDX/3D X-ray/TEM/X-section/etc.



  • Master degree or above in Microelectronic science and technology or Material science and technology or Mechanical engineering or Electrical Engineering.
  • English communication skills: CET-4 or above, be fluent both in oral and written English.
  • Basic understanding of assembly process flow & materials and wafer fabrication processes.
  • Basic knowledge of operation principle for NAND/DDR/ASIC.
  • Basic Computer & Microsoft Office skills are required, AutoCAD/Cadence/JMP are preferred.
  • Be capable of analyzing SEM/FIB/TEM/EDX results, operating is preferred.
  • Ability to achieve results in a fast moving, dynamic environment.
  • Ability to troubleshoot and analyze complex problems.
  • Ability to multi-task and meet deadlines with team work.
  • Open mind and positive communication with In-time feedback.
  • Good Adoptability and Agility with fast changing environment.
  • Self-motivated and self-directed, however, must have demonstrated ability to work well with people. 
  • A proven desire to work as a team member, both on the same team and cross team.
  • Willingly creative and exceed.
  • Excellent English communication (written and verbal) and interpersonal skills.
  • Be capable of occasionally over time work and oversea business travel.


Western Digital offers a highly competitive compensation package and great benefits. Western Digital provides equal employment opportunities to all employees and applicants for employment without regard to race, color, religion, creed, gender, national origin, age, disability, marital or veteran status, sexual orientation, gender identity or expression, or any other legally protected status.


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