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Principal Engineer, ASIC Development Engineering

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Location: Chubei City, Hsinchu County, Taiwan 
Req ID: JR-0000027139


  • Work with architecture team to define SOC micro architecture design specification, IP specification, implement new IP or customize existing IP design.
  • Develop ASIC IP design plan and timeline.
  • Responsible for external/ internal IP qualification, integration, reuse, verification and IC production test.
  • Work with verification team to complete test plan, IP verification and whole chip verification task.
  • Support FPGA team on implementation and debug activity.
  • Support Platform Firmware team on chip bring up and debug activity.
  • Work with ASIC implementation team on constraint quality, timing closure, design test mode and test plan.
  • Work with test engineer to debug test vector.
  • Work with system team to complete compliance test and review PCB schematic.


  • Bachelor’s degree in Electrical Engineering with 10 years experience in Controller Design.
  • Must be familiar with the most recent Intel and ARM Architectures. 
  •  Familiarity with Marvell and Intel Processors desired and a plus